Lattice Semiconductor (Nasdaq: LSCC) and Arm (Nasdaq: ARM) have outlined a server-platform design that combines Arm AGI CPUs, Lattice field-programmable gate arrays and AMI firmware for AI data center infrastructure. The companies said the design is intended to add secure control, management, connectivity and platform adaptability around AI compute systems as organizations expand higher-density environments.
The work focuses on the supporting control plane rather than a new AI accelerator. Lattice said its FPGAs would operate alongside an Arm AGI CPU server platform and a baseboard management controller, while AMI firmware provides boot and platform-management capabilities. In that arrangement, the FPGA acts as a companion component for platform trust, connectivity and infrastructure control.
That distinction matters for data center operators. Building AI capacity involves more than adding processors and accelerators: teams also need a way to boot systems, manage hardware, connect components, isolate faults and keep platform configurations within a defined security baseline. The companies are presenting the combination as an architecture that can address those management functions while preserving room to adapt designs as requirements change.
The design also uses the Open Compute Project’s LTPI, or Low Voltage Differential Signaling Tunneling Protocol and Interface. Lattice said LTPI provides an open, standardized connection between the Host Processor Module and the Datacenter Secure Control Module. Standardized component connections can help equipment makers build modular systems, but the announcement does not establish which server vendors will ship the architecture or when products based on it will be commercially available.
Arm said the arrangement expands the ecosystem around its AGI CPU platform by integrating secure management and control. Lattice described the result as a foundation for deployments that require interoperability and scalable infrastructure. Both are product-positioning statements; the announcement does not provide performance benchmarks, security-test results or details on supported management interfaces beyond the stated platform components and standard.
For infrastructure teams, the relevant question is whether a modular control design simplifies lifecycle operations compared with vendor-specific management implementations. An FPGA can be updated to support changing interfaces or control logic, while firmware and management controllers handle other system functions. But the operational value will depend on how original equipment manufacturers integrate the pieces, expose telemetry and connect the resulting systems to existing automation and security tools.
The companies plan to demonstrate the joint server solution at the Open Compute Project Global Summit in San Jose from Oct. 12 to 15. That is a demonstration milestone, not evidence of broad production deployment. The companies did not disclose customer commitments, supported server configurations, pricing or a release schedule.
The collaboration nevertheless reflects a practical constraint in AI infrastructure: compute density increases the importance of secure, manageable platform controls. If server makers adopt the design, it could give operators a more standardized base for integrating control, connectivity and trust functions. Enterprises will still need to evaluate the eventual systems’ firmware supply chain, management APIs, update processes and compatibility with their own data center operations.
The collaboration also highlights the division of responsibility in modern server platforms. A CPU, baseboard controller, firmware and FPGA can each have distinct security and operational roles. Operators will need clear ownership for updates, vulnerability response and telemetry when those components are supplied by multiple vendors and assembled into one platform.